Principal AI Compiler Engineer - NPU & 3nm SoC | Tokyo

Join a global semiconductor technology leader as a Principal AI Compiler Engineer, driving the architecture and development of advanced compiler and code generation technologies for next-generation 3nm System-on-Chip (SoC) platforms.

In this permanent position, you will play a central role in maximising compute performance for automotive AI, neural processing units (NPUs) and hardware accelerators, supporting the development of software-defined vehicles and next-generation smart mobility technologies.

You will lead the design of AI compiler architectures, covering model ingestion, computational graph optimisation, intermediate representation lowering, code generation and runtime integration.

Working at the intersection of AI compiler engineering, machine learning inference and hardware-software co-design, you will optimise the execution of complex AI workloads on highly specialised semiconductor architectures.

Your work will include operator fusion, quantisation-aware graph transformations, memory-aware scheduling, tensor layout optimisation, tiling and multi-core execution strategies, with a strong focus on performance, efficiency and deterministic execution.

You will collaborate with SoC architects, AI accelerator designers and high-performance computing engineers to influence future hardware capabilities and ensure compiler output meets demanding automotive requirements for functional safety, real-time performance and reliability.

As a principal-level technical specialist, you will define engineering direction, mentor experienced engineers and establish best practices without direct people management responsibilities.

This opportunity is ideal for an experienced AI Compiler Engineer, Compiler Architect, NPU Compiler Engineer, Machine Learning Compiler Specialist or Semiconductor Software Engineer seeking a high-impact permanent position in Tokyo.

Key Responsibilities

• Lead the architecture and development of AI compiler technology across model ingestion, graph optimisation, intermediate representation lowering, code generation and runtime integration.
• Design and implement advanced computational graph optimisations, including operator fusion, quantisation-aware rewrites, memory-aware scheduling and graph partitioning.
• Optimise NPU and AI accelerator performance through tiling, tensor layout optimisation, memory management and multi-core execution strategies.
• Develop and improve compiler backends and code generation techniques for custom hardware accelerators and next-generation 3nm SoC platforms.
• Collaborate with SoC and AI accelerator architects to influence hardware design decisions using insights from compiler behaviour and workload performance.
• Define, measure and improve performance KPIs for automotive AI inference workloads, using simulators, profilers and silicon-correlated performance models.
• Ensure compiler-generated code meets functional safety, deterministic execution and real-time processing requirements for automotive applications.
• Evaluate and enhance compiler infrastructure using technologies such as MLIR, LLVM, TVM and proprietary intermediate representations (IRs).
• Work with cross-functional hardware and software engineering teams to optimise CNNs, transformers, perception models and generative AI inference workloads.
• Provide principal-level technical leadership and mentorship to senior engineers, establishing architectural direction and engineering best practices without direct line management responsibilities.

Required Skills and Qualifications

Experience:

• Master's degree or PhD in Computer Science, Electrical Engineering or a related discipline, or equivalent professional experience.
• Deep professional experience designing and developing AI compilers, machine learning compiler frameworks, accelerator backends or graph optimisation systems.
• Strong hands-on expertise in computational graph optimisation and performance tuning for NPUs or custom AI hardware accelerators.
• Practical experience with MLIR, LLVM, TVM or proprietary compiler intermediate representations (IRs).
• Strong understanding of AI inference workloads, including convolutional neural networks (CNNs), transformers, perception models or generative AI.
• Advanced programming proficiency in C, C++ and Python for compiler development, performance optimisation and systems engineering.
• Solid understanding of compiler code generation, model lowering, runtime integration and hardware-aware optimisation.
• Experience analysing performance bottlenecks and improving execution efficiency on specialised compute architectures.

Soft Skills:

• Strong technical leadership and architectural vision, with the ability to define engineering direction for complex compiler technologies.
• Excellent communication skills when collaborating with semiconductor architects, AI researchers and software engineering teams.
• Proven ability to mentor senior engineers and influence technical decisions without direct people management authority.
• Analytical and methodical problem-solving skills when investigating complex compiler and hardware performance challenges.
• Ability to work effectively within Agile development environments, including Scrum-based engineering teams.
• Strong ownership mindset with a commitment to engineering quality, performance optimisation and technical innovation.

Language Requirements:

• Japanese: Basic level for communication within the local working environment.
• English: Fluent level for technical discussions, engineering documentation and collaboration with global development teams.

Preferred Skills & Qualifications

• Experience developing automotive software, autonomous driving systems or other safety-critical applications.
• Strong understanding of heterogeneous SoC architectures, including CPU, GPU, DSP and NPU processing units.
• Experience in hardware-software co-design, particularly where compiler requirements influence accelerator architecture.
• Knowledge of performance modelling, simulator-based profiling and silicon-correlated performance analysis.
• Experience optimising AI inference workloads for embedded systems, real-time processing or automotive perception applications.
• Familiarity with functional safety, deterministic execution and performance constraints in automotive semiconductor environments.

About the Company

Our client is a global leader in semiconductor technology, developing advanced System-on-Chip (SoC) and microcontroller solutions for automotive, industrial and infrastructure applications.

The organisation operates at the forefront of semiconductor innovation, combining sophisticated silicon design with advanced software engineering to support increasingly demanding computing requirements.

Its mobility division is pioneering next-generation 3nm silicon platforms designed to power software-defined vehicles, advanced automotive AI and smart mobility technologies.

The company's engineering teams work across high-performance computing, AI acceleration, compiler development and hardware-software integration, enabling complex machine learning workloads to run efficiently on specialised semiconductor platforms.

With a strong focus on technical excellence and long-term innovation, the organisation provides an environment where experienced engineers can shape foundational technologies and influence future generations of automotive computing systems.

This is an opportunity to lead core AI compiler technology for flagship semiconductor platforms, contributing directly to the evolution of autonomous driving and intelligent mobility.

Why You'll Love Working Here

• Take a leading role in developing core AI compiler technology for flagship 3nm SoC platforms.
• Contribute directly to next-generation autonomous driving, automotive AI and software-defined vehicle technologies.
• Work on advanced NPU optimisation, compiler code generation and hardware accelerator performance engineering.
• Influence the design of future semiconductor hardware through compiler-driven hardware-software co-design.
• Gain exposure to sophisticated MLIR, LLVM, TVM and AI compiler optimisation techniques.
• Solve challenging problems involving real-time AI inference, functional safety and deterministic execution.
• Collaborate with a world-class high-performance computing and semiconductor engineering team.
• Enjoy substantial technical influence and architectural ownership without requiring direct people management responsibilities.
• Mentor experienced engineers and help define compiler architecture standards and engineering best practices.
• Build a long-term career at the forefront of AI semiconductor innovation, 3nm SoC development and next-generation automotive computing.

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